ST Yap, our Senior Manager, R&D, D&D Engineering, spent more than 24 years of his career in Intel Malaysia in various technical and engineering management positions i.e. IC design and platform application enabling.

He started his career in IC design as part of the pioneer design team and worked extensively on advanced 16-bit microcontrollers and USB hub controllers and later moved to technical leads and management positions in design and pre-silicon verification on chipsets and CPU design projects.

ST also had 3 distinct long-term assignments to 3 different US sites in which he has gained extensive exposure and experiences on IC design process from conception to final products. ST was also the Technical Training CZAR for the Penang design center that devised the 3-phase VLSI design training program that successfully trained and integrated a significant number of graduate trainees over a 3-year period. 

Besides IC Design, ST took charge and grew the Platform Application engineering team to provide technical support and technology enabling for APAC OEM/ODM’s time-to-market launch of their products. ST also successfully drove a new multi-site collaborative team that enabled a significant 6 months pull-in of launching of the 1st leading OEM system based on new low-cost IA CPU.

ST is well recognized for this managerial experience of leading and growing different functional teams and his exceptional drive for focus and follow through in making things happen. He holds an MBA from University of South Australia, a BEE (Hons.) from USM and a patent filed in US. He is also a PMP certified practitioner.

Get In Touch

Tel: +604 6144 888
Fax: +604 6144 800

Level 1, Block C, Sains@USM,
10, Persiaran Bukit Jambul,
11900 Bayan Lepas, Penang, Malaysia

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